Field of the Invention
Generally, the present disclosure relates to the manufacture of sophisticated semiconductor devices, and, more specifically, to various methods, structures, and systems for preparing and using an electrical fuse (e-fuse) in semiconductor devices.
Description of the Related Art
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed on a group of semiconductor wafers, sometimes referred to as a lot, using semiconductor-manufacturing tools, such as exposure tool or a stepper. As an example, an etch process may be performed on the semiconductor wafers to shape objects on the semiconductor wafer, such as polysilicon lines, each of which may function as a gate electrode for a transistor. As another example, a plurality of metal lines, e.g., aluminum or copper, may be formed that serve as conductive lines that connect one conductive region on the semiconductor wafer to another. In this manner, integrated circuit chips may be fabricated.
Known for today's semiconductor devices are e-fuses. E-fuses enable dynamic customization of on-chip circuitry, i.e., a circuit can be converted from closed to open by “blowing” an e-fuse. Currently, silicide, polysilicon, and metal-based e-fuses are known. Such e-fuses may be blown by the application of a high electrical voltage or current, which may be a programmable voltage or current. Given that all non-superconducting materials have some resistance, the high electrical current flowing through heats the e-fuse. Heating the e-fuse may lead to thermal rupture, electromigration, or a combination thereof, thereby breaking the conductive path through (“blowing”) the e-fuse.
Unfortunately, known e-fuse approaches suffer a number of shortcomings that preclude full adoption of this useful technology in recent CMOS device architectures. Forming silicides typically requires high temperatures (greater than about 400° C.). Silicide-based e-fuses are generally limited by their size (finite resistance) and hence scalability. Also, in advanced complementary metal-oxide-semiconductor (CMOS) fabrication processes, silicides cannot be readily formed before a replacement metal gate (RMG). Metal e-fuses avoid some of the shortcomings of silicides, but suffer from poor reliability and defects. Blowing a metal e-fuse typically involves electromigration (movement of atoms in the presence of an electric field). Thus, metal e-fuses typically require large size (due to finite resistance), further process complexity (e.g., extra masks, etch steps etc.) in preparing migration zones and destinations within a nascent semiconductor device, and a high electrical programmable current/voltage (typically 1-10 V and 1-100 mA) to blow the e-fuse.
Therefore, it would be desirable to have an e-fuse that can be readily fabricated in RMG, middle-of-line (MOL) or back-end-of-line (BEOL) processes (and/or in processes forming finned field-effect transistor (FinFET) devices), at small sizes (on the order of tens of nanometers) that are thus scalable, at ambient temperatures, with minimal modification of existing semiconductor device fabrication processes, and/or that can be easily blown with relatively low programmable voltage/current with greater reliability and lower defect densities.
The present disclosure may address and/or at least reduce one or more of the problems identified above regarding the prior art and/or provide one or more of the desirable features listed above.